Author:Lian Duan
作者:段炼
此文用于SoC Encounter 7.1,也可供其他版本的使用者参考。
This article is written for SoC Encounter 7.1 , and it can also be a reference for users of other encounter version.
环境:使用了ST microelectronics的45nm库,由于它给高校的LEF文件不全,我使用OSU的45nm实验库做了补全,层数改为1p7m(layer: 1 poly 7 metal)。
Environment: I use the 45nm library from ST microelectronics. The LEF file of this library is not complete so I combine it with another LEF file written by OSU. The library has been modified to be 1p7m(layer: 1 poly 7 metal).
当我们导入网表时,可以设置io assignment file,很多朋友找不到相关帮助文件在什么地方,如果你用的是cadence 2008,你可以在./soc71/doc/soceUG目录下找到soceUG.pdf这个文件。然后搜索"assignment"关键字即可。
When we import our netlist, we can set the io assignment file. Someone may have difficulties to find the help documents. It is under the directory ./soc71/doc/soceUG if you are using cadence 2008. You can open the file soceUG.pdf in that directory and search for keyword "assignment".
写好的io文件可以用Design -> Load -> I/O File导入,但Design -> Import Design -> I/O Assignment File不支持此格式,怀疑后者还是只认老版本的格式。
The io file can be imported by menu: Design -> Load -> I/O File, but it can not be import by menu: Design -> Import Design -> I/O
(globals
version = 3
io_order = default
)
其中version 表示I/O format的版本,io_order表示排列次序,例如default指:水平的边,从左到右排,垂直的边,从下往上排。
where version specifies the version of the I/O format. Io_order specifies the order of I/O pins. This can be clockwise, counterclockwise, or default. The option "default" means: for horizontal edge is from left to right, for vertical edge is from bottom to top.
(iopin
(top
(pin name="N_in" offset=0.2700 layer=2 width=0.0700 depth=0.0700 place_status=placed )
(pin name="N_out" skip=1.3410 layer=2 width=0.0700 depth=0.0700 place_status=placed )
)
(left
)
(right
)
(bottom
)
)
以上是.io文件的正文示例。在这里,top等是edge,pin name,layer分别代表pin的名称和金属层,width和depth是pin的宽和长。offset和skip分别表示绝对偏移量和间距,以μm为单位。
This is the example io file. Top, ...etc, is the edge of chip. Pin name and layer specify the name and metal of the pin. Width, depth specify the size of the pin. Offset and skip specify the offsets and distance of the pins in μmeters, respectively.
写好的io文件在Floorplan以后导入,即可获得想要的io pin排列。
We should import io file after floorplan and the specified arrangement of io pins will be achieved.
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